A. . Biswas, S. . Dhar, Y. S. . Gupta, and A. . Paul, “Reducing Latency in Network-on-Chip Using an Enhanced Mesh Topology”, DMP-LNCSE, no. IMPACT26, pp. 535–547, Mar. 2026, doi: 10.65890/dmp-lncse.IMPACT26.157.